1. Field of the Invention
The present invention relates to a semiconductor device and a method for producing the same. In particular, the present invention relates to a semiconductor laser element device including a semiconductor laser element mounted on a sub-mount, and a method for producing the semiconductor laser element device.
2. Description of the Related Art
An optical semiconductor element (in particular, a semiconductor laser) is being put into a practical use in the fields of optical information processing and optical communication. In both the fields, there is a demand for an increase in power of a laser. However, if the power is increased, there is a problem that reliability is decreased due to heat generated by an element and the like. This makes it important to develop an element configuration and a production process capable of keeping high reliability.
For example, in order to enhance heat radiation of a semiconductor laser element, a configuration is well known in which a base to be a heat sink made of a material having a high heat conductivity, and a sub-mount made of a material having a thermal expansion coefficient close to that of the laser element are stacked successively to be bonded to each other (e.g., see JP56(1981)-27988A and JP63(1988)-233591A).
FIG. 11 is a side cross-sectional view showing a configuration of a conventional semiconductor laser device. As shown in FIG. 11, the conventional semiconductor laser device has a configuration in which a semiconductor laser element 101, a sub-mount 102, and a base 103 are stacked. The semiconductor laser element 101 has a semiconductor layered body 131, a reverse-surface electrode 107, and a surface electrode 106. The surface electrode 106 is a pattern electrode composed of a plurality of patterned layers and is formed on one surface of the semiconductor layered body 131 in which an active layer 111 is formed. The reverse-surface electrode 107 composed of a plurality of layers is formed on the other surface of the semiconductor layered body 131. In FIG. 11, a light-emission point 112 of the semiconductor laser element is shown.
Furthermore, the sub-mount 102 includes an electrical insulating material 132, a surface electrode 108, a solder layer 104, a reverse-surface electrode 109, and a solder layer 105. On one surface of the electrical insulating material 132, the surface electrode 108 composed of a plurality of layers and the solder layer 104 are formed in this order. On the other surface of the electrical insulating material 132, the reverse-surface electrode 109 composed of a plurality of layers and the solder layer 105 are formed in this order.
Furthermore, the base 103 has a radiator 133 and an Au-plating layer 110. The Au-plating layer 110 is formed on the surface of the radiator 133.
Referring to FIG. 9, the semiconductor laser element 101 and the sub-mount 102 are bonded to each other by melting of the solder layer 104 therebetween. The sub-mount 102 and the base 103 are bonded to each other by melting of the solder layer 105 therebetween. Consequently, the semiconductor laser device shown in FIG. 11 is formed.
In the case where the driving current of the conventional semiconductor laser element 101 is in a wide current range of, for example, tens of mA to hundreds of mA, the amount of heat generation is increased. Therefore, a metallic radiator made of Cu or the like covered with a metal film 110 or the like in which Au-plating is formed on Ni-plating is used. Furthermore, the sub-mount 102 is made of a material having a thermal expansion coefficient close to that of the semiconductor laser element 101 in view of the connection process such as melting and bonding of the solder layers 104, 105, and the influence of heat generation during an operation of the semiconductor laser device.
Examples of the material for the solder layer 104 generally include an alloy of Au and Sn (hereinafter, referred to as an “AuSn alloy”), an alloy of Ag and Sn (hereinafter, referred to as an “AgSn alloy”), PbSn, AuSi, AuGe, AuZe, InSb, and the like. In particular, the AuSn alloy is used often in the semiconductor laser device due to its excellent corrosion resistance, high-temperature strength, and thermal shock resistance, and its small specific resistance.
In particular, the AuSn alloy and the AgSn alloy exhibit the effect of bonding at a low temperature due to a low melting point. For example, the melting point of Au is 1063° C.; however, by mixing Sn with Au, the melting point of Au is remarkably decreased, and in an eutectic composition of Au (80 wt %)-Sn (20 wt %), the melting point of Au is decreased to an eutectic point of 278° C. When the content of Sn is equal to or more than 20 wt %, the melting point of Au tends to increase gradually.
The melting point of Ag also is remarkably decreased by being mixed with Sn, and in an eutectic composition of Ag (3.5 wt %)-Sn (96.5 wt %), the melting point of Ag is decreased to an eutectic point of 221° C. Thus, the AgSn alloy enables mounting at a temperature lower than that of the AuSn alloy. When the content of Sn is equal to or more than 96.5 wt %, the melting point of Ag tends to increase gradually.
In mounting of the semiconductor laser element 101, bonding at a lower temperature is required for the following reason. Hereinafter, the case where the AuSn alloy is used as a material for a plating layer will be described. The surface electrode 106 provided on the semiconductor laser element 101 and the surface electrode 108 provided on the surface of the sub-mount 102 are made of a plating layer whose surface mainly contains Au. When the surface electrodes 106 and 108 are connected by heating via the solder layer 104, the AuSn alloy contained the solder layer 104 and Au contained in the electrodes 106 and 108 are alloyed to be integrated, whereby the surface electrodes 106 and 108 are bonded to each other via the solder layer 104. When the temperature is decreased to room temperature after connecting the surface electrodes 106 and 108, stress accumulates in the semiconductor laser element 101 due to a change in size of both materials caused by the difference in thermal expansion coefficient between the semiconductor laser element 101 and the sub-mount 102. This stress strains the semiconductor laser element 101, which greatly degrades the reliability of the semiconductor laser element 101.
Therefore, as the material for the sub-mount 102, SiC, AlN, diamond, Mo, or the like having physical property values (e.g., a thermal expansion coefficient, Young's modulus, etc.) close to those of the material for the semiconductor laser element 101 is selected. Furthermore, in order to reduce thermal stress, bonding at a lower temperature is required, and a solder material having a low melting point is selected for the solder layer 104.
In connection between the solder layer 104 made of an AuSn alloy and the surface electrodes 106 and 108, in the case where the content of Sn with respect to the total amount of Au of the alloy formed by the connection is an eutectic composition of Au(80 wt %)-Sn(20 wt %), bonding at a lowest melting point is made possible. However, in the case where a shift from the eutectic composition occurs, the melting point is increased. Thus, when the bonding temperature is set in accordance with the lowest melting point, the AuSn alloy of the solder layers 104 and 105 is not melted, or sufficient bonding strength cannot be obtained even if it is melted. When the bonding temperature is increased so as to avoid this, thermal stress is increased and causes strain. Because of this, it is important to control the content of Sn with respect to the total amount of Au in the surface electrodes 106, 108 and the solder layer 104.
Hereinafter, a method for forming the solder layer 104 of the AuSn alloy will be described. A first forming method is based on vapor deposition. The first forming method includes a method for stacking an Au layer and a Sn layer alternately to a desired thickness, using Au and Sn as respective vapor deposition sources (e.g., see JP6(1994)-69608A), and a method for forming an AuSn layer to a desired thickness, using an AuSn alloy that has been controlled for a composition as a vapor deposition source (e.g., see JP8(1996)-181392A). According to these methods, the thicknesses of the Au layer and the Sn layer, and the compositions thereof can be controlled by the thickness precision enabled by vapor deposition.
However, in order to obtain stable bonding strength, the thickness of the solder layer 104 desirably is 1 μm or more. In order to obtain the desired thickness, the film-formation time is prolonged, and the amount of a vapor deposition material is increased, which leads to an increase in cost.
A second method is to form an Au layer and a Sn layer by plating. According to this method, an Au-plating layer and a Sn-plating layer are stacked successively, and then, the stack is heated to form the solder layer 104 of an AuSn alloy. Alternatively, an Au-plating layer is formed on one opposed surface between the semiconductor laser element 101 and the sub-mount 102 to be bonded, and a Sn-plating layer is formed on the other opposed surface therebetween; they are heated under the condition that they are in contact, whereby the semiconductor laser element 101 is bonded to the sub-mount 102 (e.g., see JP11(1999)-204884A). According to this method, a thick layer can be obtained in a short period of time. Therefore, the solder layer 104 can be produced at a cost lower than that of the method using vapor deposition.
Next, mounting of the semiconductor laser element 101 on the sub-mount 102 will be described.
Generally, the semiconductor laser element 101 is mounted on the sub-mount 102 by a Junction-down (hereinafter, referred to as “J-down”) method in most cases. According to the J-down method, the surface electrode 106 side of the semiconductor laser element 101 is bonded to the sub-mount 102. In the semiconductor laser element 101, the active layer 111 is formed on a side dose to the surface electrode 106. According to the J-down method, the semiconductor laser element 101 is bonded to the sub-mount 102 in such a manner that the surface electrode 106 on a side close to the active layer 111 generating heat is positioned dose to the base 103 that is a radiator. This allows the heat generated by the active layer 111 to diffuse to the sub-mount 102 smoothly. Therefore, the heat radiation of the semiconductor laser device can be enhanced.
However, in the case of the J-down method, the interval between the active layer 111 including the light-emission point 112 and the sub-mount 102 is several μm. Therefore, the solder layer 104 melted in the course of connection may come around the side wall portion of the semiconductor laser element 101 to cause a short-circuit defect, and may cover the light-emission point 112 to block laser light.
Therefore, as shown in FIG. 9, in most cases, the area for forming the solder layer 104 is patterned so as to be smaller than the contour of the semiconductor laser element 101. However, even with such a configuration, when a positional shift occurs in the course of arranging the semiconductor laser element 101 on the sub-mount 102, the solder material for the solder layer 104 may come around the side wall surface of the semiconductor laser device 101.
FIG. 10 shows each component before bonding for another conventional semiconductor laser device. FIG. 10 is different from FIG. 9 in that the solder layer 104 is not formed on the surface electrode 108 of the sub-mount 102, but is formed on the surface electrode 106 of the semiconductor laser element 101.
As shown in FIG. 10, in the case where the solder layer 104 is formed on the semiconductor laser element 101 side, even when a positional shift occurs in the course of mounting, the solder material for the solder layer 104 is unlikely to come around the side wall surface of the semiconductor laser element 101. Furthermore, in the case of using a two-wavelength laser element, a GaN laser element, or the like as the semiconductor laser element 101, the surface electrode 106 is composed of two or more pattern electrodes having the same thickness, and their electrode interval is small (i.e., about 100 μm). However, even in such a case, the solder layer 104 does not spread more than necessary, so that a short-circuit defect caused by the interval of the pattern electrodes can be prevented.
Furthermore, the advantages in the case where the solder layer 104 is formed on the semiconductor laser element 101 side will be described with reference to FIGS. 12A to 12C and FIGS. 13A to 13D. FIGS. 12A to 12C are views respectively illustrating an example of a mounting process for a semiconductor laser element in the case where a solder layer is formed on a sub-mount side.
First, as shown in FIG. 12A, the sub-mount 102 is held on a needle-shaped adsorbing collet 129, and placed at a predetermined position on the base 103. Next, as shown in FIG. 12B, the semiconductor laser element 101 is held by another adsorbing collet 130, and placed at a predetermined position on the sub-mount 102. Next, as shown in FIG. 12C, the resultant stack is heated to raise the temperature to melting points of the solder layers 104 and 105. Consequently, the solder layers 104 and 105 are melted simultaneously, and the base 103 and the sub-mount 102, and the semiconductor laser element 101 are bonded to each other simultaneously.
FIGS. 13A to 13D are views respectively illustrating an example of a mounting process for a semiconductor laser element in the case where a solder layer is formed on the semiconductor laser element side. First, as shown in FIG. 13A, the sub-mount 102 is held by the needle-shaped adsorbing collet 129, and placed at a predetermined position on the base 103. Then, the resultant stack is heated as shown in FIG. 13B to raise the temperature to the melting point of the solder layer 105, whereby the solder layer 105 is melted, and the base 103 is bonded to the sub-mount 102. Next, as shown in FIG. 13C, the semiconductor laser element 101 is held by another adsorbing collet 130, and placed at a predetermined position on the sub-mount 102. Next, as shown in FIG. 13D, the resultant stack is heated to raise the temperature to the melting point of the solder layer 104. Consequently, the solder layer 104 is melted, whereby the sub-mount 102 and the semiconductor laser device 101 are bonded to each other. It also may be possible for the sub-mount 102 to be bonded to the semiconductor laser element 101, and the resultant stack then bonded to the base 103 to produce a semiconductor laser device.
In such a production process, when the temperature is raised to the melting point of the solder layer 104 in bonding between the semiconductor laser element 101 and the sub-mount 102, in most cases, the stack is heated under the condition of being supplied with a load of about 10 g by the adsorbing collet 129 or 130 so that the semiconductor laser element 101 and the sub-mount 102 are not shifted from predetermined positions.
According to the method shown in FIGS. 13A to 13D, the steps shown in FIGS. 13A and 13B, and the steps shown in FIGS. 13C and 13D can be performed simultaneously at different positions. In this case, compared with the method shown in FIGS. 12A to 12C, there is an advantage of a high production efficiency. Furthermore, immediately after the sub-mount 102 and the semiconductor laser element 101 are placed at respective predetermined positions, they are bonded to each other, so that there also is an advantage of a high positional precision.
On the other hand, in the case where the solder layer 104 is formed on the sub-mount 102 side as shown in FIG. 12A, when the semiconductor laser element 101 is bonded to the sub-mount 102 after the base 103 is bonded to the sub-mount 102, there is the following problem. The surface of the solder layer 104 on the sub-mount 102 is placed at a predetermined position on the base 103 while being held by the adsorbing collet 129. Furthermore, the resultant stack is heated in that state. Therefore, the solder layer 104 also is melted at the same time as the melting of the solder layer 105, and a mark of the adsorbing collet 129 is formed on the surface of the solder layer 104 to generate level difference. Furthermore, there is a problem that a solder material adheres to the end of the adsorbing collet 129, and the like. When the solder layer 104 is melted in the course of bonding between the base 103 and the sub-mount 102, Au in the surface electrode 108 diffuses to increase the melting point thereof and the surface electrode 108 may be oxidized. Therefore, the temperature required thereafter for bonding the semiconductor laser element 101 to the sub-mount 102 via the solder layer 104 becomes high.
In order to solve these problems, the following is proposed: solder materials having different melting points are used for the solder layers 104 and 105, and the composition ratio of the same solder material is varied (e.g., JP11(1999)-214791A and JP9(1997)-172224A). According to these methods, along with an increase in steps, there is a possibility that the cost of the sub-mount 102 may be increased, and the bonding temperature and solder composition may be varied.
On the other hand, in the case where the solder layer 104 is formed on the semiconductor laser element 101 side as in the method shown in FIGS. 13A to 13D, the solder layer 104 is not formed on the opposed sub-mount 102 surface. Therefore, even if the sub-mount 102 is adsorbed and held by the adsorbing collet 129, and heating is performed while a load is applied, the mark of the adsorbing collet is not formed on the solder layer 104, and the solder layer 104 does not adhere to the adsorbing collet 129. However, in the case where the semiconductor laser element 101 with the solder layer 104 formed thereon is mounted on the sub-mount 102, the following problem arises. For example, as disclosed in JP11(1999)-204884A, when the solder layer 104 made of an AuSn alloy or the like is formed by plating, a thick film is obtained in a shorter period of time, compared with the vapor deposition method. However, the AuSn alloy layer or the like is formed after previously performing heat treatment, so that the number of steps is increased. Furthermore, since each layer is thick, there is a problem that the composition after alloying is not uniform in a layer, and stress is increased due to the variation in a melting point, the variation in a composition, and the segregation of Sn. Furthermore, JP11(1999)-204884A proposes a method for forming a paired layer including a thin Au-plating layer and a thin Sn-plating layer repeatedly, and controlling the total thickness of the Sn-plating and Au-plating. However, according to this method, the operation time is prolonged in the same way as in the case of vapor deposition.
Furthermore, as described with reference to FIG. 10, since the solder layer 104 is formed on the semiconductor laser element 101 side, there are advantages that a solder material can be prevented from coming around the side wall surface of the semiconductor laser element 101, a mounting method with a high production efficiency is applicable, and the like, as described above. On the other hand, there is a problem in cleavage processing.
Cleavage processing refers to an operation in which, when the semiconductor laser element 101 is produced, a plurality of semiconductor laser elements 101 are formed as a single unit, and then, the unit is divided into individual semiconductor laser elements 101. Hereinafter, the cleavage processing and problems caused therein will be described with reference to the drawings. FIGS. 14A to 14C are views respectively illustrating the steps of cleavage processing of a semiconductor laser element. As shown in FIG. 14A, a plurality of semiconductor layers each including an active layer are stacked successively on a semiconductor substrate, whereby a plurality of semiconductor layered bodies 131 formed as a single unit are provided. Furthermore, on the surface of the semiconductor layered bodies 131 on which the semiconductor layers are formed, a plurality of grooves 121 for cleavage are formed in parallel to each other at an equal interval for each interval of the semiconductor laser elements 101 in a resonator length direction (X direction in FIGS. 14A to 14C) of the semiconductor laser element 101 (see FIG. 10). Next, over the entire surfaces of the semiconductor layer uppermost portions of the semiconductor layered bodies 131, the surface electrodes 106 patterned in a lattice shape are provided in portions excluding cleavage regions, and the reverse-surface electrodes 107 are provided over the entire reverse surfaces of the semiconductor layered bodies 131. On each surface-electrode 106, the solder layer 104 made of an AuSn alloy is formed. The solder layer 104 is formed in a region narrower than the surface electrode 106, so that a part of the surface electrode 106 is exposed so as to surround the semiconductor layer 104. In order to cut out the semiconductor layered bodies 131 in a rectangular shape with a Y direction being a longitudinal direction, a plurality of short scribe points 122 are formed at an equal interval on each side edge in the resonator direction of the semiconductor layered bodies 131 in a rectangular shape.
Then, as shown in FIG. 14B, the semiconductor layered bodies 131, the surface electrodes 106, and the reverse-surface electrodes 107, which are formed as a single unit, are cleaved (primary cleavage) in the Y direction, using each scribe point 122 (see FIG. 14A) provided on the semiconductor layered bodies 131 cut out in a rectangle as a starting point, a plurality of bar-shaped element connected bodies 123 are obtained.
Next, as shown in FIG. 14C, each bar-shaped element connected body 123 (see FIG. 14B) is cleaved (secondary cleavage) along the grooves 121 for cleavage, whereby a plurality of semiconductor laser elements 101 are obtained.
Each semiconductor laser element 101 includes the surface electrode 106 on the front surface of the semiconductor layered body 131, and the reverse-surface electrode 107 on the reverse surface thereof. Furthermore, the solder layer 104 is provided on the surface electrode 106. A voltage is applied between the surface electrode 106 and the reverse-surface electrode 107, whereby laser light is output from an end face formed by primary cleavage.
In the above-mentioned process, in primary cleavage and secondary cleavage, generally, a pattern is recognized using the difference in reflection of light between the regions of the surface electrodes 106 and the other regions by irradiating the surfaces of the semiconductor layered bodies 131 with light, and a cleavage angle and a cleavage position can be adjusted from the recognized pattern. Particularly in primary cleavage, when the crystal direction of the semiconductor layered body 131 is not matched with the cleavage direction, the cleavage surface is not matched with the crystal surface. Therefore, level differences and scars are formed on an end face, and the end face does not function as an end face mirror. Furthermore, laser light is eclipsed, which substantially degrades characteristics.
In order to solve this problem, by increasing the difference in reflectance between the regions of the surface electrodes 106 and the other regions (e.g., the solder layer 104), the recognition ratio of the surface electrodes 106 is enhanced. For example, the surfaces of the surface electrodes 106 or the surfaces of the other regions are roughened with an etchant or the like to decrease flatness, and the like.
However, the AuSn alloy used in the solder layer 104 has very high flatness, and also has resistance to an etchant. Therefore, it is difficult to form unevenness on the surface. Thus, the clear difference in reflectance between the surface electrodes 106 and the other regions is not obtained, and pattern recognition cannot be performed satisfactorily. Furthermore, even after the primary cleavage, there are a number of steps of recognizing the pattern of the surface electrodes 106, aligning them, and defining the direction thereof, so that similar problems arise.
On the other hand, since the AuSn solder layer is dark green, the difference in color under visible light between the surfaces of the surface electrodes 106 and those of the other regions (e.g., the surfaces on which Pt is exposed) is clear. Therefore, if pattern recognition is performed by color extraction or the like, the above-mentioned problem may be solved. However, according to this method, the recognition property is unstable, and an apparatus having a color identification capability is expensive.